First Picture of a Cell Processor - Smaller Than a Pushpin, More Powerful Than a PC

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http://graphics8.nytimes.com/images/2005/02/07/business/07chip.jpg



http://www.nytimes.com/2005/02/07/technology/07chip.html?ex=1108443600&en=78e28e3f45125c3d&ei=5040&partner=MOREOVERNEWS



Smaller Than a Pushpin, More Powerful Than a PC
By JOHN MARKOFF

Published: February 7, 2005



















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AN FRANCISCO, Feb. 6 - In a new volley in the battle for digital home
entertainment, I.B.M., Sony and Toshiba will announce details Monday of
their newest microprocessor design, known as Cell, which is expected to
offer faster computing performance than microprocessors from Intel and
Advanced Micro Devices.

Anticipation of the announcement, to be made at an industry conference here,
has touched off widespread industry speculation over the impact of the new
chip technology, which promises to enhance video gaming and digital home
entertainment.

Sony plans to use the new Cell in its PlayStation 3, likely to be introduced
in 2006, and Toshiba plans to use the chip in advanced high-definition
televisions, also to be introduced next year.

However, many industry executives and analysts say that Cell's impact may
ultimately be much broader, staving off the PC industry's efforts to
dominate the digital living room and at the same time creating a new digital
computing ecosystem that includes Hollywood, the living room and
high-performance scientific and engineering markets.

"There is a new game in town, and it will revive an industry that has been
kind of sleepy for the last few years," said Richard Doherty, a computer
industry analyst and president of Envisioneering, a market research company
in Seaford, N.Y.

The Cell's introduction also comes at a time when the computer industry has
largely given up investing in fundamentally new processor designs and has
instead chosen to use the additional space available on the newest
generation of chips to place multiple processors and thus add performance.

The Cell chip, computer experts said, could have a theoretical peak
performance of 256 billion mathematical operations per second. With that
much processing power, the chip would have placed among the top 500
supercomputers on a list maintained by scientists at the University of
Mannheim and the University of Tennessee as recently as June 2002.

"This is extremely impressive," said Kevin Krewell, editor in chief of
Microprocessor Report, an industry technical publication, "and it proves
that architectural innovation isn't dead."

Several computer industry executives warned, however, that despite the
Cell's impressive specifications, success is not guaranteed for any new
design in the computer industry. For example, Intel and Hewlett-Packard have
spent more than a decade and hundreds of millions of dollars on the Itanium
and the chip has yet to find a receptive market.

The Cell has a modular design based on a slightly less powerful I.B.M.
processor that is currently in G5 64-bit desktop computers from Apple
Computer. Additionally, the Cell architecture is distinguished by the fact
that it controls an array of eight additional processors that the design
team refers to as synergistic processing elements, or S.P.E.'s. Each of the
S.P.E.'s is a 128-bit processor in its own right.

The Cell has some components that in the lab switch at 5.6 GHz, and several
people familiar with the design said that it was both more flexible than is
generally understood and that it has been designed with high bandwidth
communications, such as high-speed data links to homes, in mind.

"Cell has been optimized for broadband-rich applications," said Jim Kahle,
I.B.M.'s director of technology at the Design Center for Cell Technology,
the headquarters in Austin, Tex., for the I.B.M., Sony and Toshiba
partnership.

He said that I.B.M. had refined a technology also being developed by Intel
called "virtualization," which is designed to isolate applications from one
another. Originally used in mainframe computing applications, the technology
is now being exploited by consumer electronics designers to run demanding
applications like video decompression and decryption simultaneously.

One significant risk for Sony and I.B.M. is that the Sony PlayStation 3 game
machine is likely to be introduced later than the next generation of Xbox
from Microsoft. The PlayStation 2 beat the Xbox to market and Microsoft was
never able to catch up, meaning that it lost hundreds of millions of dollars
on its bet on the video game market.

In its next version of the Xbox, Microsoft plans to shift from using Pentium
chips from Intel to a PowerPC microprocessor from I.B.M. The chip will have
two PowerPC processor cores, but it will not be as radically new as the
I.B.M. Cell design that Sony plans to use, said one executive who is
familiar with the Microsoft project.

That will make for a fascinating rivalry: Sony is betting that its computer
horsepower advantage will be large enough to give it a quality advance over
Microsoft, even if it arrives late.

"Our goal with the Cell is to be an order of magnitude faster," said Lisa
Su, an I.B.M. executive in charge of technology development and licenses.

Many industry executives believe that because of its low cost, the Cell is a
harbinger of a fundamentally new computing era that will push increasingly
into consumer applications.

"I think it will aid in some of the convergence between consumer and
corporate I.T. and this will accelerate amazingly from the consumer side,"
said Andrew Heller, a former I.B.M. processor designer who is now chairman
of Heller & Associates, a consulting firm in Austin, Tex.

One area of wide speculation is whether Apple might become a partner in the
Cell alliance in the future. Apple is already the largest customer for the
PowerPC chip, and it would be simple for the company to take advantage of
the Cell design. Several people familiar with Apple's strategy, however,
said that the computer maker had yet to be convinced that the Cell
technology could provide a significant performance advantage.

[NEXT BOX]

I don't want to hype today *too* much, for fear of disappointment. but in
less than 10 hours, there is *supposed* to be quiet a bit of information
released on the Cell Processor Element, Cell APU and Cell PU. the basic
building blocks of Cell Processors and Cell Systems. As well as information
on the software side, if i'm not mistaken.

geeks have been waiting 4 years for this, since Cell was announced in early
2001.

[Ken Hagan]

NEXT BOX wrote: I don't want to hype today *too* much, for fear of disappointment. but in less than 10 hours ... [snip] geeks have been waiting 4 years for this, since Cell was announced in early 2001.

Personally, I can wait another 10 hours. I can even wait a further few
days for folks to digest the information. Besides, anyone who has been
holding their breath for 4 years will have died of "hype-oventilation".

[Ryan]

"NEXT BOX" <nextbox@xbox2.net> wrote in message
news:mKWdnTMftJ82_prfRVn-jA@comcast.com... http://graphics8.nytimes.com/images/2005/02/07/business/07chip.jpg Smaller Than a Pushpin, More Powerful Than a PC By JOHN MARKOFF Published: February 7, 2005

So what's the significant since we already have dual-core chips from both
AMD and Intel?

[keith]

In article <36pufiF51ru0tU1@individual.net>, Ryan@aol.com says... "NEXT BOX" <nextbox@xbox2.net> wrote in message news:mKWdnTMftJ82_prfRVn-jA@comcast.com... http://graphics8.nytimes.com/images/2005/02/07/business/07chip.jpg Smaller Than a Pushpin, More Powerful Than a PC By JOHN MARKOFF Published: February 7, 2005 So what's the significant since we already have dual-core chips from both AMD and Intel?
"We already have"? Who's "we"?

--
Keith

[NEXT BOX]

IBM, Sony, Sony Computer Entertainment Inc. and Toshiba Disclose Key
Details of the Cell Chip
Monday February 7, 1:00 pm ET
Innovative Design Features Eight Synergistic Cores Together with Power Based
Core, Delivers More Than 10 Times the Performance of the Latest PC
Processors

SAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- At the International Solid
State Circuits Conference (ISSCC) today, IBM, Sony Corporation, Sony
Computer Entertainment Inc. (Sony and Sony Computer Entertainment
collectively referred to as Sony Group) and Toshiba Corporation (Toshiba)
for the first time disclosed in detail the breakthrough multi-core
architectural design - featuring supercomputer-like floating point
performance with observed clock speeds greater than 4 GHz - of their jointly
developed microprocessor code-named Cell.

Source: IBM

· View multimedia news release


A team of IBM, Sony Group and Toshiba engineers has collaborated on
development of the Cell microprocessor at a joint design center established
in Austin, Texas, since March 2001. The prototype chip is 221 mm(2),
integrates 234 million transistors, and is fabricated with 90 nanometer SOI
technology.

Cell's breakthrough multi-core architecture and ultra high-speed
communications capabilities deliver vastly improved, real-time response for
entertainment and rich media applications, in many cases 10 times the
performance of the latest PC processors.

Effectively a "supercomputer on a chip" incorporating advanced
multi-processing technologies used in IBM's sophisticated servers, Sony
Group's computer entertainment systems and Toshiba's advanced semiconductor
technology, Cell will become the broadband processor used for industrial
applications to the new digital home.

Another advantage of Cell is to support multiple operating systems, such as
conventional operating systems (including Linux), real-time operating
systems for computer entertainment and consumer electronics applications as
well as guest operating systems for specific applications, simultaneously.

Initial production of Cell microprocessors is expected to begin at IBM's
300mm wafer fabrication facility in East Fishkill, N.Y., followed by Sony
Group's Nagasaki Fab, this year. IBM, Sony Group and Toshiba expect to
promote Cell-based products including a broad range of industry-wide
applications, from digital televisions to home servers to supercomputers.

Among the highlights of Cell released today:

* Cell is a breakthrough architectural design -- featuring eight synergistic
processors and top clock speeds of greater than 4 GHz (as measured during
initial hardware testing)
* Cell is a multicore chip capable of massive floating point processing
* Cell is OS neutral and supports multiple operating systems simultaneously

"Today's disclosure of the Cell chip's breakthrough architectural design is
a significant milestone in an ambitious project that began four years ago
with the creation of the IBM, Sony and Toshiba design lab in Austin, Texas,"
said William Zeitler, senior vice president and group executive, IBM Systems
and Technology Group. "Today we see the tangible results of our
collaboration: an open, multi-core, microprocessor that portends a new era
in graphics and multi-media performance."

"Today, we are very proud to share with you the first development of the
Cell project, initiated with aspirations by the joint team of IBM, Sony
Group and Toshiba in March 2001," said Ken Kutaragi, executive deputy
president and COO, Sony Corporation, and president and Group CEO, Sony
Computer Entertainment Inc. "With Cell opening a doorway, a new chapter in
computer science is about to begin."

"We are proud that Cell, a revolutionary microprocessor with a brand new
architecture that leapfrogs the performance of existing processors, has been
created through a perfect synergy of IBM, Sony Group and Toshiba's
capabilities and talented resources, "said Masashi Muromachi, corporate vice
president of Toshiba Corporation and president & CEO of Toshiba's
Semiconductor Company. "We are confident that Cell will provide major
momentum for the progress of digital convergence, as a core device
sustaining a whole spectrum of advanced information-rich broadband
applications, from consumer electronics, home entertainment through various
industrial systems."

[NEXT BOX]

http://home.businesswire.com/portal/site/google/index.jsp?ndmViewId=news_view&newsId=20050207005340&newsLang=en

[NEXT BOX]

http://biz.yahoo.com/bw/050207/75391_1.html
Cell Processor Uses Rambus High Speed Interface Solutions
Monday February 7, 1:01 pm ET
XDR(R) DRAM and Redwood FlexIO(TM) Processor Bus Provide Unprecedented
Bandwidth for Next-Generation Computer and Consumer Applications


SAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- Rambus Inc. (Nasdaq:RMBS -
News), a leading developer of chip interface products and services, today
revealed that the Cell processor incorporates Rambus's XDR memory and
FlexIO(TM) processor bus interface solutions. Cell is the highly-anticipated
advanced microprocessor developed by Sony Corporation, Sony Computer
Entertainment, Toshiba Corporation and IBM. The memory and processor bus
interfaces designed by Rambus account for 90% of the Cell processor signal
pins, providing an unprecedented aggregate processor I/O bandwidth of
approximately 100 gigabytes-per-second.
Rambus is scheduled to discuss the Cell interface clocking and circuit
design at the International Solid State Circuits Society conference in San
Francisco on February 9, 2005.

"The Cell processor, that has overwhelming computational power, demands
another overwhelming data transfer capability between Cell and main memory
system, and Input/Output systems. Rambus, underpinned by its expertise in
latest memory technology, provided us with a clear solution that was
absolutely the best match to Cell," said Ken Kutaragi, executive deputy
president and COO, Sony Corporation, and president and Group CEO, Sony
Computer Entertainment Inc. "I respect Rambus and all our team members that
collaborated together for completing this challenging work with all the
technology and enthusiasm they possess."

"We have been busy working with the Sony Group and Toshiba on the
development of the Cell processor for the past couple of years and we're
excited to see this advanced engineering effort become a reality," said
Harold Hughes, chief executive officer at Rambus. "Our engineering teams
have not only designed and developed the world's fastest memory and logic
interfaces but we continue to help our customers integrate various system
components which enable them to bring high-performance, high-value products
to the market."

The Rambus XDR memory interface, capable of data rates of 3.2GHz to 8.0GHz,
achieves data rate speeds that are an order of magnitude higher than today's
mainstream PC memory systems while utilizing fewer DRAMs and fewer
controller pins. FlexIO processor buses, formerly codenamed Redwood, are
capable of running up to 6.4GHz data rates providing bandwidth more than
four times faster than best-of-class processor buses available today. All
Rambus high-speed interfaces are developed as complete solutions for
high-volume, low-cost systems.

Sony and Toshiba signed a licensing agreement with Rambus in January 2003.
Since then the engineering teams have worked closely to design and develop
the high-bandwidth interface solutions necessary for next-generation
computing and consumer devices.

About Rambus Inc.

Rambus is one of the world's leading providers of advanced chip interface
products and services. Since its founding in 1990, the company's
innovations, breakthrough technologies and integration expertise have helped
industry-leading chip and system companies solve their most challenging and
complex I/O problems and bring their products to market. Rambus's interface
solutions can be found in numerous computing, consumer, and communications
products and applications. Rambus is headquartered in Los Altos, California,
with regional offices in Chapel Hill, North Carolina, Taipei, Taiwan and
Tokyo, Japan. Additional information is available at www.rambus.com.

Note to Editors: For information on the Cell processor, please see "IBM,
Sony, Sony Computer Entertainment Inc. and Toshiba Disclose Key Details of
the Cell Chip" press release issued today at 10:00 a.m. PST.

[Ar Q]

"NEXT BOX" <nextbox@xbox2.net> wrote in message
news:PdydnevuBZAsT5rfRVn-vg@comcast.com... http://biz.yahoo.com/bw/050207/75391_1.html Cell Processor Uses Rambus High Speed Interface Solutions Monday February 7, 1:01 pm ET XDR(R) DRAM and Redwood FlexIO(TM) Processor Bus Provide Unprecedented Bandwidth for Next-Generation Computer and Consumer Applications SAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- Rambus Inc. (Nasdaq:RMBS - News), a leading developer of chip interface products and services, today revealed that the Cell processor incorporates Rambus's XDR memory and FlexIO(TM) processor bus interface solutions.

I think all these years Rambus has only accomplished one thing-- Rambus
memory interface system adds one simple processor to control traffic between
memory and system bus. As system clock becomes faster, data skew problem
becomes more serious. It is one solution, not the ONLY solution. As RDRAM vs
DDR results shown, the best solution is not to add an active stage. The
addition of the new circuits might become the bottleneck of computer
systems. We saw latency on system with RDRAM. When they show how great the
bandwidth is, they are always feeding the system the ideal data streams.

And Rambus probably get the idea from Adaptec whose SCSI controller is to
use one simple processor to control traffic betweem storage and system bus.
The original idea is from Adaptec. But Rambus wants to extend its patents to
cover everything interfacing computer components.

[NEXT BOX]

http://www.realworldtech.com/forums/index.cfm?action=detail&PostNum=3098&Thread=1&entryID=45958&roomID=13

Name: David Wang (dwang@realworldtech.com) 2/7/05

Today is the day that the CELL processor family gets announced.
I'll be writing a few things about the various papers at ISSCC on CELL, but
before the news conference starts and the papers gets official unveiling,
some interesting data have already been presented in the technical digests.

The CELL processor presented has 1 64b PPC core acting as the traditional
scalar processor, complete with its own L2. The PPE (PowerPC processing
Element) is connected to 8 other SPE's (Synergistic Processing Elements) The
SPE's are the magic glue that is suppose to contain enormous amount of
compute power and a bunch of them gets you the enormously large flop rating
that we've all head much about.

Some stats.

1. 90nm SOI process.

2. Logic depth is functionally equivalent to about 20 FO4 (est), but circuit
speed equivalence is 11 FO4 per stage. The short pipestage circuit depth is
reached with "circuit efficiencies" and Dynamic logic !?!

3. With per stage delay of 11 FO4, the schmoo plots show that the SPE's can
crank from 3.2 GHz @ 0.9V Vdd to 5.2 GHz @ 1.3 V Vdd. The entire chip has
similar frequency/voltage range, but to get to 5.2 Ghz @ 1.3V, each SPE will
eat 11~12W. Add in the rest and the chip will get really hot. 4 GHz @ 1.1V =
4W per SPE seems to be the nominal range.

4. Die size per SPE is 2.5 x 5.81 mm^2. The entire chip with 8 SPE's seems
to be about 17.2 x 12 mm^2. That seems to be an awfully large chip for IBM.
The CPU to be used in PS3/Xbox2 will probably be the 65nm version or it'll
have to have fewer SPE's.

6. As previously announced, the off chip I/O interface is Rambus Redwood and
the memory interface is XDR. Similar clocking/deskewing schemes. Looks to be
about ~50 GB/s BW to memory, and 50~100 GB/s to I/O.

I'll write up articles as the papers are presented.

[NEXT BOX]

http://www.wired.com/news/infostructure/0,1377,66528,00.html?tw=newsletter_topstories_html
New Chip to Challenge Intel






02:04 PM Feb. 07, 2005 PT

SAN FRANCISCO -- Setting up a battle for the future of computing, engineers
from IBM, Sony and Toshiba unveiled details Monday of a microprocessor they
claim has the muscle of a supercomputer and can power everything from
video-game consoles to business computers.

Devices built with the processor, code-named Cell, will compete directly
with the PC chips that have powered most of the world's personal computers
for a quarter century.

Wireless Hot Spot burgeoning world of rich media and broadband networks in
mind, can deliver 10 times the performance over today's PC processors.

It also will not carry the same technical baggage that has made most of
today's computers compatible with older PCs. That architectural divergence
will challenge the current dominant paradigm of computing that Microsoft and
Intel have fostered.

The new chip is expected to be used in Sony's next-generation PlayStation
game console. Toshiba plans to incorporate it into high-end televisions. And
IBM has said it will sell a workstation with the chip.

Beyond that, companies are remaining coy about where it might be used and
whether it will be compatible with older technology.

"With this massive computing power, we'll get to the point where we'll get
closer to (a) photo-realistic-type effect that will be able to be generated
by the computer," said Jim Kahle, an IBM fellow.

Supercomputer claims are nothing new in the high-tech industry, and over the
years chip and computer companies have steadily improved microprocessor
performance even without altering chips' underlying architecture.

And while its competitors may well match the Cell chip in performance by the
time it debuts in 2006, it differs considerably from today's processors in
constitution.

Cell is comprised of several computing engines, or cores. A core based on
IBM's Power architecture controls eight "synergistic" processing centers. In
all, they can simultaneously carry out 10 instruction sequences, compared
with two for today's Intel chips.

The new microprocessor also is expected to be able to run multiple operating
systems and programs at the same time while ensuring each has enough
resources. In the home, that could allow for a device that's capable of
handling a video game, television and general-purpose computer at once.

"It's very flexible," Kahle said. "We support many operating systems with
our virtualization technology so we can run multiple operating systems at
the same time, doing different jobs on the system."

Later this year, Intel and Advanced Micro Devices plan to release their own
"multicore" chips, which also increase the number of instructions that can
be executed at once. IBM and Sun Microsystems already sell chips with
multiple cores, mainly for business servers.





Cell also appears to have an advantage in the number of transistors -- 234
million compared with 125 million for today's latest Pentium 4 chips.
Traditional chipmakers, however, have regularly doubled their number of
transistors every 12 to 18 months.

Cell is said to run at clock speeds greater than 4 GHz, which would top the
3.8 GHz of Intel's current top-speed chip.


Cell's designers said they are running a variety of operating systems on the
processor at their lab in Austin, Texas. But they would not say whether
Microsoft's Windows is one of them. In fact, they only confirmed running
Linux.

The PC industry has seen a long line of chips attempt to usurp the x86
architecture pioneered by Intel that dominates today's computers. But all
have failed, and Intel remains the world's largest chipmaker.

In the 1990s, IBM, Motorola and Apple Computer pushed the PowerPC
architecture. Though it's still used by the Apple Macintosh as well as IBM
workstations and servers, it failed to dethrone Intel.

Most recently, Transmeta's Crusoe was supposed to challenge Intel's
dominance in notebooks. Launched at the twilight of the tech boom in 2000,
it gained only marginal acceptance, and the company is now considering plans
to focus on licensing its patents.

Intel has since developed its own mobile chip technology, Centrino.

"Transmeta was also a disruptive influence in the market. And because of
Transmeta, we've got Centrino and the advances that have happened in mobile
computing," said Steve Kleynhans, a Meta Group analyst. "Unfortunately, we
don't really have Transmeta anymore."

For a challenger to succeed in displacing x86, it will have to perform
considerably better since it also will break computing's long-standing
tradition of backward and forward compatibility, said Justin Rattner, who
oversees Intel's Corporate Technology Group.

"They're going to have to show they're able to do things that conventional
architectures at least at the moment are incapable of doing," he said.
"That's the fundamental question."

The Cell's specifications also suggest the PlayStation 3 will offer
realistic graphics and strong performance. But analysts cautioned that not
all the features in a product announcement will find their way into all
systems built on the device.

"Any new technology like this has two components," Kleynhans said. "It has
the vision of what it could be because you need the big vision to sell it.
Then there's the reality of how it's really going to be used, which (is)
generally several levels down the chain from there."

[NEXT BOX]

http://img145.exs.cx/img145/1403/cellbefore8wt.jpg

http://img204.exs.cx/img204/7944/cell9vw.jpg

http://img204.exs.cx/img204/1457/cell21iw.jpg

http://msnbcmedia.msn.com/j/msnbc/Components/Photos/050207/050207_chip_hmed_3p.hmedium.jpg

http://news.designtechnica.com/images/news/misc/cellpic_1_.jpg

http://web.axelero.hu/varga1973/cell2.JPG

http://web.axelero.hu/varga1973/cell1.JPG

http://www.electronicsweekly.co.uk/ImageLibrary/GetImage.asp?liAssetID=1005

[Never anonymous Bud]

Using a finger dipped in purple ink, "NEXT BOX" <nextbox@xbox2.net> scribed:
Rambus is scheduled to discuss the Cell interface clocking and circuitdesign at the International Solid State Circuits Society conference in SanFrancisco on February 9, 2005.

After which, they'll file a slew of lawsuits,
claiming they developed the technology 20 years ago.





--

The truth is out there,

but it's not interesting enough for most people.

[Never anonymous Bud]

Using a finger dipped in purple ink, "NEXT BOX" <nextbox@xbox2.net> scribed:
* Cell is a breakthrough architectural design -- featuring eight synergisticprocessors and top clock speeds of greater than 4 GHz (as measured duringinitial hardware testing)* Cell is a multicore chip capable of massive floating point processing* Cell is OS neutral and supports multiple operating systems simultaneously

KEWL!~

So my websurfing, on a 28K dialup, will be even FASTER than with P4,
which we all know is SO much faster an AMD CPU for internet activity!






--

The truth is out there,

but it's not interesting enough for most people.

[keith]

On Mon, 07 Feb 2005 14:38:55 -0600, NEXT BOX wrote:

nice spam. ...but you didn't answer the question.

--
Keith

[NEXT BOX]

http://babelfish.altavista.com/babelfish/trurl_pagecontent?lp=ja_en&url=http%3A%2F%2Fpc.watch.impress.co.jp%2Fdocs%2F2005%2F0208%2Fkaigai153.htm

Cell processor with ISSCC in announcement
Finally, the Cell processor of topic dispersed that veil.

It is held in the American San Francisco, "ISSCC (IEEE International
Solid-State Circuits Conference)" with, IBM, the SONY group (SONY, the SONY
computer entertainment), Toshiba developed did the technical announcement of
the "Cell processor" jointly at 3 corporations. Rambus which is cooperative
to 3 corporations and development in the schedule which does the
dissertation announcement regarding Cell with ISSCC, leading that, held the
briefing for press at the Mariotte hotel of the ISSCC meeting place.

As for this time being announced, the technical summary of Cell of the first
generation who is produced with 90nm SOI process. Cell, with multiple core
CPU, loads 9 processor cores in one CPU. For the PC/ server as for CPU, as
for Cell the fact that the quantity of 9 and the CPU core is many is feature
in the same 90nm generation vis-a-vis being the dual core CPU which places 2
CPU cores. In addition, with the multiple core which Intel and AMD develop,
the processor core of the same architecture plural is loaded. Vis-a-vis
that, Cell combines the processor core where 2 types differ.

1 general-purpose processor core and, 8 the relatively simple processor core
is combined in 90nm edition Cell. The general-purpose processor core is
called being something which designates the 64bit POWER architecture of IBM
as the base "POWER Processor Element (PPE)" with. 8 cores, SIMD which faces
to multimedia type processing and the like (Single Instruction and Multiple
Data)"Synergistic Processor Element (SPE)" with are called with architecture
of type. However, it is not the architecture which is specialized in
processing of streaming type, also is widely used very.

- Loading the wide band bus

In addition, other than processor core, new memory "XDR of wide band DRAM
(Yellowstone: Yellow stone)"wide band interface" FlexIO for interface and
tip/chip indirect continuation (Redwood: The redwood)"it loads. The point
where memory and the high-speed bus are taken in has been similar to the K8
system CPU of AMD, but Cell zone is much wider. It is the architecture which
avoids the fact that the bus becomes the problem of processing. Also GPU
which NVIDIA develops, is seen that it is connected to this FlexIO. Each
processor core and the interface group inside Cell "Element Interconnect Bus
(EIB)" with are connected with the internal bus of very is called wide band.

As for the operational frequency of Cell, you say that with the test inside
the laboratory it exceeds 4GHz. Until recently, under the present conditions
which the frequency improvement of Intel CPU which is top speed can blunt,
even in the 90nm generation 4GHz cannot commercialize, as for the frequency
of Cell it is top class. However, as for operational frequency and electric
power consumption because it is trade-off, when being loaded onto the system
really like PlayStation 3, as for the operational frequency of Cell, you say
that it differs depending upon each system.

Efficiency the single precision due to 8 SPE (32bit) reaches to 256 GFLOPS
with floating point arithmetic. This, when with 8 SPE executing the sum of
products calculation of 4 parallel SIMD with 8GHz, is numerical value. You
call 1TeraFLOPS with 1 tip/chip which at the beginning was expected although
it does not reach to the efficiency "of supercomputer class of just a little
front", with general purpose CPU by far it is. In addition, SPE because it
has the mechanism which can execute the streaming processing which is made
poor the general-purpose processor in high speed, becomes much fast than
former general purpose CPU depending upon processing. You say that
efficiency of 10 times can be actualized depending upon application.

Die/di size (area of semiconductor itself), with present trial manufacture
tip/chip 221mm2. This to be a little smaller than 239.7mm2 of the first
generation Emotion for PlayStation 2 Engine, 0.18 ? m edition Pentium 4
(Willamette: ??????) almost it is the same as 217mm2. In other words,
productivity and production cost mean the same level basically.



- PowerPC and instruction set interchangeable PPE


PPE of Cell is the processor core of POWER architecture, but you say that it
is not diversion of the existing core, it is the new core which from one was
developed with scratch. However, as for instruction set existing POWER
system CPU and being completely interchangeable, as for the software it is
possible to be able to send basically that way. In addition, with PPE,
PowerPC 970 (G5) with in the same way, AltiVec and interchangeable vectoring
operational function "VMX" of Motorola are mounted. In other words, PPE
PowerPC 970 (G5) with means the interchangeability.

Furthermore, PPE Hyper-Threading and similar SMT of Intel (Simultaneous
Multithreading) loads also function, it is possible to execute two threads
simultaneously. With PPE and 8 SPE which mount SMT of 2way, altogether Cell
10 threads can be executed in parallel. In other words, when you see from
software side, in order for there to be 10 CPU in Cell, it means to be
visible. PPE has L2 cash of 512KB.

As for SPE which 8 is loaded in Cell, it is the SIMD type processor which
can do the same processing simultaneously in 1 order vis-a-vis the plural
data. It is possible to think that it became the processor where SSE unit of
X86 type CPU becomes independent. Same as SSE, the single precision floating
point data of 32bit 4 and integer data 4 can be processed simultaneously in
1 order.

In addition, with SPE, the various architecture which are optimized in
streaming processing are taken in. For example, we have 128 these 128bit
registers, developing the loop which is in the midst of programming, to SIMD
converting, we are possible also to process in parallel. In addition, "Local
Store (LS)" of 256KB with the memory which is called is loaded.

The major feature of Cell is the point where bus the inside and outside the
tip/chip is very wide band. EIB which connects each element inside Cell the
transfer of 768bit is possible in 1 cycle. Because the usual on-chip bus is
128bit and 256bit, Cell is especially high speed. In addition, memory loads
the interface of the next generation memory XDR of Rambus DRAM at dual,
memory zone reaches to 25.6GB/sec. With the zone of 76.8GB/sec, dividing
into 2 ports, can FlexIO of interface between the tip/chip use. In other
words, it can connect 2 companion tips/chips such as GPU and the I/O chip.
In addition, like K8 of AMD also can plural Cell connect mutually with
FlexIO.

[Tony Hill]

On Mon, 7 Feb 2005 18:12:50 -0600, "NEXT BOX" <nextbox@xbox2.net>
wrote:
http://www.realworldtech.com/forums/index.cfm?action=detail&PostNum=3098&Thread=1&entryID=45958&roomID=133. With per stage delay of 11 FO4, the schmoo plots show that the SPE's cancrank from 3.2 GHz @ 0.9V Vdd to 5.2 GHz @ 1.3 V Vdd. The entire chip hassimilar frequency/voltage range, but to get to 5.2 Ghz @ 1.3V, each SPE willeat 11~12W. Add in the rest and the chip will get really hot. 4 GHz @ 1.1V =4W per SPE seems to be the nominal range.

Even at that they're talking about 32W JUST for the SPEs. Add in
another chunk for the PPE and you could easily be up in the 50-60W
range. Not much as compared to a modern, high-speed processor, but it
could complicate stuffing the thing into the cramped confines of a
gaming console.
4. Die size per SPE is 2.5 x 5.81 mm^2. The entire chip with 8 SPE's seemsto be about 17.2 x 12 mm^2. That seems to be an awfully large chip for IBM.The CPU to be used in PS3/Xbox2 will probably be the 65nm version or it'llhave to have fewer SPE's.

Supposed to be about 220mm^2 total. Rather hefty processor. At a
(very) rough guess that should have a per-processor cost of somewhere
around $70-$80.
6. As previously announced, the off chip I/O interface is Rambus Redwood andthe memory interface is XDR. Similar clocking/deskewing schemes. Looks to beabout ~50 GB/s BW to memory, and 50~100 GB/s to I/O.

50GB/s of bandwidth has got to be at least 6 XDR channels, 16-bit wide
each, running at a bit over 4.1GT/s. Might even be as much as 8 XDR
channels. That ain't gonna come cheap. Nor will the 6 or 8 (at
least) memory chips required. High bandwidth I/O is going to be
expensive as well, and all this is probably going to require at least
an 8 layer PCB, adding more cost.

I'm really having a tough time figuring out just how Sony plans to get
this console into the ~$300 price range that they will probably need
to sell at. Even with taking a large loss on each console it'll be
tough.

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca

[Tony Hill]

On Mon, 7 Feb 2005 06:48:43 -0600, "NEXT BOX" <nextbox@xbox2.net>
wrote:
http://graphics8.nytimes.com/images/2005/02/07/business/07chip.jpghttp://www.nytimes.com/2005/02/07/technology/07chip.html?ex=1108443600&en=78e28e3f45125c3d&ei=5040&partner=MOREOVERNEWSSmaller Than a Pushpin, More Powerful Than a PCBy JOHN MARKOFF

I like how they make it sound small as compared to PC chips. The
actual processor is ~220mm^2 on a 90nm process.

For comparison, Intel's latest "Prescott" P4 has a die size of 112mm^2
and AMD's Athlon64 weighs in at a mere 84mm^2, both on a 90nm process.
Even the dual-core versions of these two processors will be smaller
than a Cell.
Sony plans to use the new Cell in its PlayStation 3, likely to be introducedin 2006, and Toshiba plans to use the chip in advanced high-definitiontelevisions, also to be introduced next year.

Has anyone figured out how this processor is actually going to improve
a television in any way? I'm really curious about this one. Just
what is it that they're planning on processing in the TV signal? DRM?
However, many industry executives and analysts say that Cell's impact mayultimately be much broader, staving off the PC industry's efforts todominate the digital living room and at the same time creating a new digitalcomputing ecosystem that includes Hollywood, the living room andhigh-performance scientific and engineering markets.

Awful big claims for a processor that has exactly ZERO software
support. I've said it MANY times before and I'll say it many times in
the future, hardware is cheap, software is *EXPENSIVE*
"Cell has been optimized for broadband-rich applications," said Jim Kahle,I.B.M.'s director of technology at the Design Center for Cell Technology,the headquarters in Austin, Tex., for the I.B.M., Sony and Toshibapartnership.

What, exactly, is a "broadband-rich" application? Playing computer
games?
He said that I.B.M. had refined a technology also being developed by Intelcalled "virtualization," which is designed to isolate applications from oneanother. Originally used in mainframe computing applications, the technologyis now being exploited by consumer electronics designers to run demandingapplications like video decompression and decryption simultaneously.

Hmm.. DVD players can do both decompression and decryption on about $1
worth of embedded controller + ASIC. How much more compression and/or
encryption are they really planning on here?

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca

[INGSOC]

Tony Hill wrote:
Has anyone figured out how this processor is actually going to improve a television in any way? I'm really curious about this one. Just what is it that they're planning on processing in the TV signal? DRM?

It will project a hologram of Jolene Blalock directly /into/ /your/ *brain*.



--
Texeme
http://texeme.com

[NEXT BOX]

http://gamesindustry.biz/content_page.php?aid=6700

_________________________________________________________
Cell consortium reveals chip details, claim 4GHz + clock speeds

Rob Fahey 12:11 08/02/2005

Few surprises at unveiling, but eight-SPU design and high clock speeds are
confirmed

Official details of the Cell microprocessor have been revealed by partners
IBM, Sony and Toshiba, with the multi-core architecture set to be capable of
processing ten threads on a single chip clocked at over 4Ghz.

The chip package will consist of a 64 bit Power processor - similar to the
CPUs being used in the Xbox 2 and PowerMac G5 systems - which can process
two threads simultaneously, along with eight "synergistic processing units".

These SPUs are the real horsepower behind the chip; each one has 256KB of
its own memory and can handle computing tasks separately from the main
processor, which will be responsible for dividing up tasks between the SPUs
and running the operating system.

While clock speeds are an almost entirely meaningless measurement of
processor performance, especially when comparing chips as radically
different as Cell and the existing Intel / AMD families, much attention has
been focused on the claim that the Cell could start out at speeds of over
4GHz.

Despite not being a clear indicator of actual performance, the speed is
still a PR coup for IBM and its partners - since Intel's range of chips
currently maxes out at 3.8GHz, while Cell may go as high as 4.6GHz in its
early incarnations.

More useful as a performance measurement is the chip's rating in terms of
calculations per second, or "gigaflops", with Cell rated at 256 gigaflops
according to IBM - a fair bit short of an entry in the Top 500
Supercomputers list, which starts at 851 gigaflops, but still enormously
powerful for a single chip, and of course the chips are designed to operate
efficiently in clusters.

Indeed, it's widely expected that the PlayStation 3 could boast as many as
four Cell chips, which would give a theoretical CPU performance of over 1000
gigaflops, or one teraflop - a very theoretical measure, admittedly, but
still enough to earn the PS3 a place on the supercomputer list.

Another aspect of the performance which IBM has been quick to champion is
the memory bandwidth available to the Cell, with the design utilising RAMBUS
interface technology that delivers an unprecedented one hundred gigabytes
per second of bandwidth to the chip, with separate interfaces for
communicating with system memory and with other CPUs.

Despite Sony's claims, one thing we won't be seeing in the near future is
Cell being used in portable devices such as mobile phones - according to an
IBM spokesperson, the chip, which is initially being manufactured on a 90
nanometre process but will eventually move down to 65 nanometre, runs hot
enough to require a cooling fan, like most desktop CPUs.

Spokespeople from the Cell consortium were quick to point out the
flexibility of the system, saying that the multi-processor architecture
could be used in a variety of different ways by game developers or other
software creators.

However, game developers contacted by GamesIndustry.biz downplayed
speculation that the PS3 would be incredibly difficult to program as a
result of the new architecture, saying that the main difficulty would be the
move to a multi-core system - a design shared by the Xbox 2 and almost
certainly by the Nintendo Revolution.

The game development model which is used for PlayStation 2, where a few
programmers work directly with the low level code to create libraries for
specific functions and other developers simply use those libraries, masking
the complexity of the underlying system, is likely to work just as well on
PlayStation 3, while the prevalence of middleware such as Criterion's
RenderWare or the Havok physics engine will also make the transition less
painful.

Another factor fingered by developers is the fact that Sony's PlayStation
Portable libraries and documentation have been widely praised by those
working on the system, indicating that Sony has learned an important lesson
from the PS2 launch - where much of the development difficulty lay not with
the system itself, but with poorly translated (or un-translated)
documentation and difficult to use libraries.

Along with the Cell processors, the PlayStation 3 is also set to use a
graphics chipset from NVIDIA, which will be based on the company's next
generation of GPU, following on from the hugely successful 6000 series of PC
graphics cards.
____________________________________________________________________________
_

[Mike Tomlinson]

In article <PdydnevuBZAsT5rfRVn-vg@comcast.com>, NEXT BOX
<nextbox@xbox2.net> writes
SAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- Rambus Inc. (Nasdaq:RMBS -News), a leading developer of chip interface products and services, todayrevealed that the Cell processor incorporates Rambus's XDR memory andFlexIO(TM) processor bus interface solutions.

Oh well. I won't be buying anything containing a Cell processor then.

--
Rarely do people communicate; they just take turns talking.
(source unknown)

[Gnu_Raiz]

On Tue, 08 Feb 2005 01:55:23 +0000, Never anonymous Bud wrote:
Using a finger dipped in purple ink, "NEXT BOX" <nextbox@xbox2.net> scribed:* Cell is a breakthrough architectural design -- featuring eight synergisticprocessors and top clock speeds of greater than 4 GHz (as measured duringinitial hardware testing)* Cell is a multicore chip capable of massive floating point processing* Cell is OS neutral and supports multiple operating systems simultaneously KEWL!~ So my websurfing, on a 28K dialup, will be even FASTER than with P4, which we all know is SO much faster an AMD CPU for internet activity!

For a minute I thought I was in an Alt.binaries group, you know who can
post first about the cell processor. Kind of like all geeks, falling all
over themselves to get the news out, between this and Star Trek being
canceled, guess its got everyone worked up.

Gnu_Raiz

[Gnu_Raiz]

On Tue, 08 Feb 2005 02:44:21 -0500, Tony Hill wrote:
On Mon, 7 Feb 2005 18:12:50 -0600, "NEXT BOX" <nextbox@xbox2.net> wrote:http://www.realworldtech.com/forums/index.cfm?action=detail&PostNum=3098&Thread=1&entryID=45958&roomID=133. With per stage delay of 11 FO4, the schmoo plots show that the SPE's cancrank from 3.2 GHz @ 0.9V Vdd to 5.2 GHz @ 1.3 V Vdd. The entire chip hassimilar frequency/voltage range, but to get to 5.2 Ghz @ 1.3V, each SPE willeat 11~12W. Add in the rest and the chip will get really hot. 4 GHz @ 1.1V =4W per SPE seems to be the nominal range. Even at that they're talking about 32W JUST for the SPEs. Add in another chunk for the PPE and you could easily be up in the 50-60W range. Not much as compared to a modern, high-speed processor, but it could complicate stuffing the thing into the cramped confines of a gaming console.4. Die size per SPE is 2.5 x 5.81 mm^2. The entire chip with 8 SPE's seemsto be about 17.2 x 12 mm^2. That seems to be an awfully large chip for IBM.The CPU to be used in PS3/Xbox2 will probably be the 65nm version or it'llhave to have fewer SPE's. Supposed to be about 220mm^2 total. Rather hefty processor. At a (very) rough guess that should have a per-processor cost of somewhere around $70-$80.6. As previously announced, the off chip I/O interface is Rambus Redwood andthe memory interface is XDR. Similar clocking/deskewing schemes. Looks to beabout ~50 GB/s BW to memory, and 50~100 GB/s to I/O. 50GB/s of bandwidth has got to be at least 6 XDR channels, 16-bit wide each, running at a bit over 4.1GT/s. Might even be as much as 8 XDR channels. That ain't gonna come cheap. Nor will the 6 or 8 (at least) memory chips required. High bandwidth I/O is going to be expensive as well, and all this is probably going to require at least an 8 layer PCB, adding more cost. I'm really having a tough time figuring out just how Sony plans to get this console into the ~$300 price range that they will probably need to sell at. Even with taking a large loss on each console it'll be tough. ------------- Tony Hill hilla <underscore> 20 <at> yahoo <dot> ca

I have to agree with you on that, seems that Sony is playing a Microsoft
with the next console.

I am surprised that no one has posted this link to a brief overview of the
chip.
http://arstechnica.com/articles/paedia/cpu/cell-1.ars

I wonder how Intel will respond to this new development, seems like a
shift might be comming. Of course we all know that development, and market
share has nothing to do with anything, probably going to be the same old
same old.

Gnu_Raiz

[Toon Moene]

Tony Hill wrote:
Has anyone figured out how this processor is actually going to improve a television in any way? I'm really curious about this one. Just what is it that they're planning on processing in the TV signal? DRM?

Well, there's this much-hoped-for option: Enhance Intelligence Level.

As someone put it: "There's this `brightness' knob, but it doesn't seem
to have the right effect".

OK, 1/2 :-)

[ Who needs television, when you have the Internet ? ]


--
Toon Moene - e-mail: toon@moene.indiv.nluug.nl - phone: +31 346 214290
Saturnushof 14, 3738 XG Maartensdijk, The Netherlands
Maintainer, GNU Fortran 77: http://gcc.gnu.org/onlinedocs/g77_news.html
A maintainer of GNU Fortran 95: http://gcc.gnu.org/fortran/

[Douglas Siebert]

Tony Hill <hilla_nospam_20@yahoo.ca> writes:
Even at that they're talking about 32W JUST for the SPEs. Add inanother chunk for the PPE and you could easily be up in the 50-60Wrange. Not much as compared to a modern, high-speed processor, but itcould complicate stuffing the thing into the cramped confines of agaming console.


That assumes it runs at 100% all the time. Are there any games today
that max out a PS2, Xbox, or a high end PC GPU for more than a few seconds
at a time? I'm sure there are complex sequences where you hit the max
but it isn't as though you have that kind of complexity all the time.

Plus, this is at 90nm, and unless they are planning to ship the PS3 in
time for this xmas, it'll be built on 65nm and the power needs would be
reduced.

Supposed to be about 220mm^2 total. Rather hefty processor. At a(very) rough guess that should have a per-processor cost of somewherearound $70-$80.


I don't see that cost as a problem for putting them in PS3 or HDTVs. And
you can cut that size pretty much in half for 65nm which will be where the
bulk of Cells are made, and it'll really be cheap later in life as a 45nm
product.

50GB/s of bandwidth has got to be at least 6 XDR channels, 16-bit wideeach, running at a bit over 4.1GT/s. Might even be as much as 8 XDRchannels. That ain't gonna come cheap. Nor will the 6 or 8 (atleast) memory chips required. High bandwidth I/O is going to beexpensive as well, and all this is probably going to require at leastan 8 layer PCB, adding more cost.
I'm really having a tough time figuring out just how Sony plans to getthis console into the ~$300 price range that they will probably needto sell at. Even with taking a large loss on each console it'll betough.


You are assuming that they don't use multi channel memory chips. No reason
they can't make a single 1Gb XDR chip that has 3 or 4 XDR interfaces with
independant memory arrays, and use two if they wanted 256MB which would
probably be a reasonable target.

For everything else, when they will be selling PS3s in the tens of millions,
perhaps as many as a hundred million over its lifetime, economies of scale
can make a lot of things cheap that wouldn't be on say a PC motherboard,
most of which are probably lucky to sell 100K units considering their short
lifetime and field filled with many nearly identical competitors.

--
Douglas Siebert dsiebert@excisethis.khamsin.net

"They that can give up essential liberty to obtain a little temporary
safety deserve neither liberty nor safety" -- Thomas Jefferson

[Jeremy Williamson]

"Mike Tomlinson" <nospam@nospam.jasper.org.uk> wrote in message
news:j4igp6AI9MCCFwE1@jasper.org.uk... In article <PdydnevuBZAsT5rfRVn-vg@comcast.com>, NEXT BOX <nextbox@xbox2.net> writesSAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- Rambus Inc. (Nasdaq:RMBS -News), a leading developer of chip interface products and services, todayrevealed that the Cell processor incorporates Rambus's XDR memory andFlexIO(TM) processor bus interface solutions. Oh well. I won't be buying anything containing a Cell processor then. -- Rarely do people communicate; they just take turns talking. (source unknown)


PS2 used Rambus as well... it actually works decently in their HW config.

J

[keith]

On Mon, 07 Feb 2005 23:12:35 -0600, NEXT BOX wrote:

Idiot! Don't you have any input of your own? Must you spam the groups
with other's words?

--
Keith

[NEXT BOX]

http://arstechnica.com/articles/paedia/cpu/cell-2.ars



Introducing the IBM/Sony/Toshiba Cell Processor -- Part II: The Cell
Architecture
By Jon "Hannibal" Stokes


In today's session, IBM introduced the overall architecture of the Cell
processor. Unfortunately, they didn't include many more microarchitectural
details in today's session than they did in yesterday's. Most of the session
covered issues like power management, clocking, the design process, and so
on. So today's article is going to be more along the lines of a follow-up to
yesterday's piece. I'll fill in the new information that I've picked up, as
well as clarifying leftover questions from yesterday.

The Cell's basic architecture
The basic architecture of the Cell is described by IBM as a "system on a
chip" (SoC) design. This is a perfectly good characterization, but I'd take
it even further and call Cell a "network on a chip." As I described
yesterday, the Cell's eight SPUs are essentially full-blown vector
"computers," insofar as they are fairly simple CPUs with their own local
storage.

These small vector computers are connected to each other and to the 512KB L2
cache via a element interface bus (EIB) that consists of four sixteen-byte
data rings with 64-bit tags. This bus can transfer 96 bytes/cycle, and can
handle over 100 outstanding requests.



The individual SPEs can use this bus to communicate with each other, and
this includes the transfer of data in between SPEs acting as peers on the
network. The SPEs also communicate with the L2 cache, with main memory (via
the MIC), and with the rest of the system (via the BIC). The onboard memory
interface controller (MIC) supports the new Rambus XDR memory standard, and
the BIC (which I think stands for "bus interface controller" but I'm not
100% sure) has a coherent interface for SMP and a non-coherent interface for
I/O.

Unfortunately, today's session was severly lacking in information on the
64-bit PPC core that handles the Cell's general-purpose computing chores. We
do know that this core has a VMX/Altivec unit, at least one FPU, and
supports simultaneous multithreading (SMT). It's also in-order issue, like
the SPUs. So it appears that this core also lacks an instruction window,
presumably for the same reasons that the SPUs do (i.e. to save on die space
and cut down on control logic.) I have in my notes that the core is
two-issue, like the SPUs, but I can't find this corroborated anywhere else.
So it's possible that the core only issues two instructions per cycle peak,
i.e. one from each currently-running thread. I'd imagine that if this is the
case, this core's pipeline is very short. This would fit with the SPUs, in
which the pipeline was also kept short and simple.

The entire Cell is produced on a 90nm SOI process with 8 layers of copper
interconnect. The Cell sports 234 million transistors, and its die size is
221mm2. (This is roughly the size of the Emotion Engine at its
introduction.) The PPC core's 32KB L1 cache is connected to the system L2
cache via a bus that can transfer 32 bytes/cycle between the two caches.

The Cell and Apple
Finally, before signing off, I should clarify my earlier remarks to the
effect that I don't think that Apple will use this CPU. I originally based
this assessment on the fact that I knew that the SPUs would not use
VMX/Altivec. However, the PPC core does have a VMX unit. Nonetheless, I
expect this VMX to be very simple, and roughly comparable to the Altivec
unit o the first G4. Everything on this processor is stripped down to the
bare minimum, so don't expect a ton of VMX performance out of it, and
definitely not anything comparable to the G5. Furthermore, any Altivec code
written for the new G4 or G5 would have to be completely reoptimized due to
inorder nature of the PPC core's issue.

So the short answer is, Apple's use of this chip is within the realm of
concievability, but it's extremely unlikely in the short- and medium-term.
Apple is just too heavily invested in Altivec, and this processor is going
to be a relative weakling in that department. Sure, it'll pack a major SIMD
punch, but that will not be a double-precision Alitvec-type punch.

[Tony Hill]

On Tue, 8 Feb 2005 22:23:07 +0000 (UTC), Douglas Siebert
<dsiebert@excisethis.khamsin.net> wrote:
Tony Hill <hilla_nospam_20@yahoo.ca> writes:Even at that they're talking about 32W JUST for the SPEs. Add inanother chunk for the PPE and you could easily be up in the 50-60Wrange. Not much as compared to a modern, high-speed processor, but itcould complicate stuffing the thing into the cramped confines of agaming console.That assumes it runs at 100% all the time. Are there any games todaythat max out a PS2, Xbox, or a high end PC GPU for more than a few secondsat a time? I'm sure there are complex sequences where you hit the maxbut it isn't as though you have that kind of complexity all the time.

It doesn't much matter, you need to design for maximum power draw
unless you want your system to shut down randomly. Well, actually I
suppose you could take the Intel route and use thermal throttling to
prevent maximum power draw from overloading a borderline cooling
solution, but I haven't heard of such a solution for the Cell.
Plus, this is at 90nm, and unless they are planning to ship the PS3 intime for this xmas, it'll be built on 65nm and the power needs would bereduced.

I'm not sure that they will be reduced all that much. Leakage current
is going WAY up for the 65nm node. With over 200M transistors it's
going to be TOUGH to keep leakage in check.
Supposed to be about 220mm^2 total. Rather hefty processor. At a(very) rough guess that should have a per-processor cost of somewherearound $70-$80.I don't see that cost as a problem for putting them in PS3 or HDTVs. Andyou can cut that size pretty much in half for 65nm which will be where thebulk of Cells are made, and it'll really be cheap later in life as a 45nmproduct.

At 65nm it should be cheaper to make, though I don't expect much
volume of 65nm chips until late 2006/early 2007. I know IBM and Intel
are both aiming for almost a year earlier, and maybe I'm just being a
cynic, but I don't think they're going to get volume out anywhere
close to on time.
50GB/s of bandwidth has got to be at least 6 XDR channels, 16-bit wideeach, running at a bit over 4.1GT/s. Might even be as much as 8 XDRchannels. That ain't gonna come cheap. Nor will the 6 or 8 (atleast) memory chips required. High bandwidth I/O is going to beexpensive as well, and all this is probably going to require at leastan 8 layer PCB, adding more cost.I'm really having a tough time figuring out just how Sony plans to getthis console into the ~$300 price range that they will probably needto sell at. Even with taking a large loss on each console it'll betough.You are assuming that they don't use multi channel memory chips. No reasonthey can't make a single 1Gb XDR chip that has 3 or 4 XDR interfaces withindependant memory arrays, and use two if they wanted 256MB which wouldprobably be a reasonable target.

That may be an option (I'll admit that I'm no expert on how XDR
channel can/do work), though it would still seem like those would be
fairly expensive chips.
For everything else, when they will be selling PS3s in the tens of millions,perhaps as many as a hundred million over its lifetime, economies of scalecan make a lot of things cheap that wouldn't be on say a PC motherboard,most of which are probably lucky to sell 100K units considering their shortlifetime and field filled with many nearly identical competitors.

I'm sure that Sony will make a push for it, I'm just not convinced
yet. I would expect that the console will first come being rather
expensive ($500+?) and might have some trouble selling. Economies of
scale only take you so far, eventually you've got to pay for
everything.

Note that there are also some rumors floating around that the PS3
might use multiple Cell processors, not just one. Now, I'm not taking
these rumors as fact by any means, but if they do turn out to be
accurate then it would push the cost up quite a bit higher.

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca

[Tony Hill]

On Tue, 8 Feb 2005 16:05:33 -0800, "Jeremy Williamson"
<jeremiah.d.williamson@NOSPAMintel.com> wrote:
"Mike Tomlinson" <nospam@nospam.jasper.org.uk> wrote in messagenews:j4igp6AI9MCCFwE1@jasper.org.uk... In article <PdydnevuBZAsT5rfRVn-vg@comcast.com>, NEXT BOX <nextbox@xbox2.net> writesSAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- Rambus Inc. (Nasdaq:RMBS -News), a leading developer of chip interface products and services, todayrevealed that the Cell processor incorporates Rambus's XDR memory andFlexIO(TM) processor bus interface solutions. Oh well. I won't be buying anything containing a Cell processor then.PS2 used Rambus as well... it actually works decently in their HW config.

Despite my rather distaste for Rambus the company and recognizing that
their technology just doesn't fit into the PC realm, for the PS2 and
the PS3 their stuff makes VERY good sense.

With the way that the PS2 processor and this new Cell processor work,
combined with the nature of the machine (ie to play games), bandwidth
is likely to be quite important while latency will be somewhat less
so. Remember that these processors are going to be doing a lot of
work traditionally associated with GPUs in a PC. Rambus' solutions,
both XDR now and RDRAM back when the PS2 was new, do offer VERY high
per-pin bandwidth and that's just the sort of thing that these
consoles need. The processors also have integrated memory controllers
which helps avoid some of the potential issues with Rambus in PCs. To
top it off, the memory chips are getting soldered right onto the
system board rather than hanging off multidrop sockets on the system
board.

Basically a PC and the PS2/PS3 have rather different designs and
different requirements. Hmm.. different solutions for different
problems... whodda thunk it! :>

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca

[Quolik the lowbrow]

Tony Hill, <hilla_nospam_20@yahoo.ca>, the ramshackle, moon-splashed farm
boy, and dishonest grocer and dealer in bad spices, puked:

hilla <underscore> 20 <at> yahoo <dot> ca

hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca
hilla_20@yahoo.ca

[chrisv]

NEXT BOX wrote:
Smaller Than a Pushpin, More Powerful Than a PC

X-Complaints-To: abuse@supernews.com

Done.

*PLONK*

[FredK]

"Jeremy Williamson" <jeremiah.d.williamson@NOSPAMintel.com> wrote in message
news:cubk4e$kii$1@news01.intel.com... "Mike Tomlinson" <nospam@nospam.jasper.org.uk> wrote in message news:j4igp6AI9MCCFwE1@jasper.org.uk... In article <PdydnevuBZAsT5rfRVn-vg@comcast.com>, NEXT BOX <nextbox@xbox2.net> writesSAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- Rambus Inc.
(Nasdaq:RMBS -News), a leading developer of chip interface products and services,
todayrevealed that the Cell processor incorporates Rambus's XDR memory andFlexIO(TM) processor bus interface solutions. Oh well. I won't be buying anything containing a Cell processor then. -- Rarely do people communicate; they just take turns talking. (source unknown) PS2 used Rambus as well... it actually works decently in their HW config.

The example of Rambus done right is the Alpha EV7

[jack]

Quolik the lowbrow <quolik.the.lowbrow@soc.med.black.amateur> wrote:

Just what the hell is your beef with Tony, you lame ass POS? FOAD.
--
Path:
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From: Quolik the lowbrow <quolik.the.lowbrow@soc.med.black.amateur>
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Subject: Re: Cell Processor Uses Rambus High Speed Interface Solutions
Date: Wed, 09 Feb 2005 12:53:10 +0545
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---

[relic]

jack wrote: Quolik the lowbrow <quolik.the.lowbrow@soc.med.black.amateur> wrote: Just what the hell is your beef with Tony, you lame ass POS? FOAD.

jack@ibm.com
jack@ibm.com
jack@ibm.com
jack@ibm.com
--
The cost of living hasn't affected its popularity

[chrisv]

jack wrote:
Quolik the lowbrow <quolik.the.lowbrow@soc.med.black.amateur> wrote:Just what the hell is your beef with Tony, you lame ass POS? FOAD.

It's just a stupid troll with a random name generator, which it uses
to avoid kill-files.

I advise deleting unread any post from someone with a name that
resembles, in any way, "Quolik the lowbrow".

[NEXT BOX]

http://games.slashdot.org/comments.pl?sid=138810&cid=11616545

Top 7 Myths of the New Cell Processor:
by Modab (153378) on Wednesday February 09, @04:56AM (#11616545) There are
so many people saying dumb things about the Cell and the upcoming PS3, I
have to set some things straight. Here goes:



1.. The Cell is just a PowerPC with some extra vector processing.
Not quite. The Cell is 9 complete yet simple CPU's in one. Each handles
its own tasks with its own memory. Imagine 9 computers each with a really
fast network connection to the other 8. You could problably treat them as
extra vector processors, but you'd then miss out on a lot of potential
applications. For instance, the small processors can talk to each other
rather than work with the PowerPC at all.


2.. Sony will have to sell the PS3 at an incredible loss to make it
competitive.
Hardly. Sony is following the same game plan as they did with their
Emotion Engine in the PS2. Everyone thought that they were losing 1-200
bucks per machine at launch, but financial records have shown that besides
the initial R&D (the cost of which is hard to figure out), they were only
selling the PS2 at a small loss initially, and were breaking even by the end
of the first year. By fabbing their own units, they took a huge risk, but
they reaped huge benefits. Their risk and reward is roughly the same now as
it was then.


3.. Apple is going to use this processor in their new machine.
Doubtful. The problem is that though the main CPU is PowerPC-based like
current Apple chips, it is stripped down, and the Altivec support will be
much lower than in current G5s. Unoptomized, Apple code would run like a G4
on this hardware. They would have to commit to a lot of R&D for their OS to
use the additional 8 processors on the chip, and redesign all their tweaked
Altivec code. It would not be a simple port. A couple of years to complete,
at least.


4.. The parallel nature will make it impossible to program.
This is half-true. While it will be hard, most game logic will be
performed on the traditional PowerPC part of the Cell, and thus normal to
program. The difficult part will be concentrated in specific algorithms,
like a physics engine, or certain AI. The modular nature of this code will
mean that you could buy a physics engine already designed to fit into the
128k limitation of the subprocessor, and add the hooks into your code. Easy
as pie.


5.. The Cell will do the graphics processing, leaving only rasterezation
to the video card. Most likely false. The high-end video cards coming out
now can process the rendering chain as fast as the Cell can, looking at the
raw specs of 256Gflops from the Cell, as opposed to about 200GFlops from
video cards. In two years, video cards will be capable of much more, and
they are already optomized for this, where the Cell is not, so video cards
will perform closer to the theoretical limits.


6.. The OS will handle the 8 additional vector processors so the
programmer doesn't need to.
Bwahahaha! No way. This is a delicate bit of coding that is going to
need to be tweaked by highly-paid coders for every single game. Letting on
OS predictively determine what code needs to get sent to what processor to
run is insane in this case. The cost of switching out instructions is going
to be very high, so any switch will need to be carefully considered by the
designer, or the frame-rate will hit rock-bottom.


7.. The Cell chip is too large to fab efficiently.
This is one myth that could be correct. The Cell is huge (relatively),
and given IBM's problems in the recent past with making large, fast PowerPC
chips, it's a huge gamble on the part of all parties involved that they can
fab enough of these things.

[NEXT BOX]

Tiny new chip packs a lot of power
IBM East Fishkill plant to make microprocessor
By Craig Wolf
Poughkeepsie Journal

What appears to be the hottest microprocessor chip in the world looked even
hotter Monday as IBM Corp., Sony Group and Toshiba Corp. revealed its
performance is 10 times that of current chips.

The tech trio's ''Cell'' chip will be made at IBM's 300-millimeter plant in
East Fishkill this summer to satisfy needs of Sony and Toshiba for a new
generation of broadband, video-hungry home entertainment systems. The plant
already makes a version of the chip being used in computer workstations
suited to game development. The plant is being expanded by IBM and six
partners, including Sony and Toshiba.

New Cell details came out in San Francisco at the International Solid State
Circuits Conference, a major annual technical gathering. Monday's
revelations were whoppers.

8 processors per chip

The chip has eight cores, or separate processors, that operate
synergistically. Industry chatter was predicting four cores. It has run at
speeds of better than 4 gigahertz, or billions of cycles per second,
somewhat ahead of Intel Corp.'s best speeds. It can run several kinds of
software simultaneously, including Linux and proprietary gaming programs.

More details are to come out today, but analysts were impressed already.

''This is still the biggest chip technology advance in probably 20 years,''
said Richard Doherty, research director at Envisioneering Group in Seaford,
Nassau County.

If anything, claims of a 10-fold leap in performance are understated,
Doherty said. ''Our estimate is 10 to 20, so they're being conservative,''
he said.

He added Cell developers said they could have put 16 cores on the same size
chip if they had thought it necessary.

Touted as a ''supercomputer on a chip" by the trio, Cell may well find use
in business environments including supercomputing, but its first and main
function will be to lift the computerized entertainment world to new levels.

Cell is aimed at your house. The chip is expected to be used in Sony's
next-generation Playstation as well as in high-definition television sets.

''It's very flexible,'' said Jim Kahle, an IBM fellow, quoted by the
Associated Press. ''We support many operating systems with our
virtualization technology so we can run multiple operating systems at the
same time, doing different jobs on the system.''

What that could mean, for example, is that gamers in different locations
could play online using Linux, an open-source software widely available
around the world. The chip could handle that work as well as running Sony's
software that controls the game logic and characters.

''Having hierarchical operating systems, if you will, that's a whole big
step in computing,'' Doherty said. ''In entertainment, that's tremendous.''

Cell was developed by the trio at IBM's Austin, Texas, facility beginning in
2001. It contains 234 million transistors in a space of 221 square
millimeters, about the size of a fingernail. It's made with 90-nanometer
process, so called because it creates features that small, a nanometer being
a billionth of a meter.

Executives toasted their teamwork in a statement issued Monday. Masashi
Muromachi, a corporate vice president of Toshiba, said, ''We are proud that
Cell, a revolutionary microprocessor with a brand new architecture that
leapfrogs the performance of existing processors, has been created through a
perfect synergy of IBM, Sony Group and Toshiba's capabilities and talented
resources.''

Whether the team's work eclipses that of leader Intel remains to be seen.
Monday was also the day on which Intel said it was now making a
two-processor chip.

''It's poor timing,'' Doherty said. ''The twin-piston engine comes out the
same day as a V-8.''

[Never anonymous Bud]

Using a finger dipped in purple ink, "NEXT BOX" <nextbox@xbox2.net> scribed:
The high-end video cards coming outnow can process the rendering chain as fast as the Cell can,

And cost $500 or more.

Not conducive to mass-marketing of game systems.





--

The truth is out there,

but it's not interesting enough for most people.

[Rob Stow]

NEXT BOX wrote:

[Snip]

Plonk !

[David Schwartz]

"Never anonymous Bud" <newskat@katxyzkave.net> wrote in message
news:1sik01trktqk3cq40js3g36qmjkdqu60dt@4ax.com... Using a finger dipped in purple ink, "NEXT BOX" <nextbox@xbox2.net> scribed: The high-end video cards coming outnow can process the rendering chain as fast as the Cell can, And cost $500 or more. Not conducive to mass-marketing of game systems.

It really doesn't matter. Whatever price point you look at ($60, $90,
$200, $400) the rate of performance improvement over time is about the same
(or slightly higher at the low end). Today you can get for $60 what cost
$400 two years ago. You can get for $90 what cost $300 last year.

A dedicated graphics chipset that is designed as part of an integrated
system that will be build as a large quantity of identical units changes the
economics significantly. A large part of the cost of selling a graphics card
is the physical interface, packaging, testing, shipping, advertising,
stocking, tooling runs, and customer support. When the graphics chipset is
part of a larger unit, all of these costs are dramatically lower. So an
integrated game system can contain the equivalent of a $200 graphics card
for an added cost of only about $50.

Due to economics of scale and buying in bulk, the price different
between the equivalent of a $200 graphics card and the equivalent of a $300
graphics card is probably negligible. Remember, the graphics chip vendors
want to push up their ability to produce high-end chips in quantity anyway.
This gives them a competitive edge in the PC graphics market.

DS

[Jeremy Williamson]

"Tony Hill" <hilla_nospam_20@yahoo.ca> wrote in message
news:lobj01t3r73gm9m6m9ju6up4d9e10gietc@4ax.com... On Tue, 8 Feb 2005 22:23:07 +0000 (UTC), Douglas Siebert <dsiebert@excisethis.khamsin.net> wrote:Tony Hill <hilla_nospam_20@yahoo.ca> writes:Even at that they're talking about 32W JUST for the SPEs. Add inanother chunk for the PPE and you could easily be up in the 50-60Wrange. Not much as compared to a modern, high-speed processor, but itcould complicate stuffing the thing into the cramped confines of agaming console.That assumes it runs at 100% all the time. Are there any games todaythat max out a PS2, Xbox, or a high end PC GPU for more than a few
secondsat a time? I'm sure there are complex sequences where you hit the maxbut it isn't as though you have that kind of complexity all the time. It doesn't much matter, you need to design for maximum power draw unless you want your system to shut down randomly. Well, actually I suppose you could take the Intel route and use thermal throttling to prevent maximum power draw from overloading a borderline cooling solution, but I haven't heard of such a solution for the Cell.

Cell is performing thermal throttling as well. It's commonplace now (and in
all honesty it's just a first order technique).


Plus, this is at 90nm, and unless they are planning to ship the PS3 intime for this xmas, it'll be built on 65nm and the power needs would bereduced. I'm not sure that they will be reduced all that much. Leakage current is going WAY up for the 65nm node. With over 200M transistors it's going to be TOUGH to keep leakage in check.

True...

So it boils down to where your power is spent. Leakage current from 65nm
vs. the PPE and SPE functional units? Ahhh, I'd have to guess the
functional units but I don't have a firm enough grasp on power
considerations to be sure.


For everything else, when they will be selling PS3s in the tens of
millions,perhaps as many as a hundred million over its lifetime, economies of
scalecan make a lot of things cheap that wouldn't be on say a PC motherboard,most of which are probably lucky to sell 100K units considering their
shortlifetime and field filled with many nearly identical competitors. I'm sure that Sony will make a push for it, I'm just not convinced yet. I would expect that the console will first come being rather expensive ($500+?) and might have some trouble selling. Economies of scale only take you so far, eventually you've got to pay for everything. Note that there are also some rumors floating around that the PS3 might use multiple Cell processors, not just one. Now, I'm not taking these rumors as fact by any means, but if they do turn out to be accurate then it would push the cost up quite a bit higher.

It's likely.

J

------------- Tony Hill hilla <underscore> 20 <at> yahoo <dot> ca

[Arrvindh Shriraman]

Tony Hill wrote: On Tue, 8 Feb 2005 16:05:33 -0800, "Jeremy Williamson" <jeremiah.d.williamson@NOSPAMintel.com> wrote:"Mike Tomlinson" <nospam@nospam.jasper.org.uk> wrote in messagenews:j4igp6AI9MCCFwE1@jasper.org.uk...In article <PdydnevuBZAsT5rfRVn-vg@comcast.com>, NEXT BOX<nextbox@xbox2.net> writes>SAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- Rambus Inc. (Nasdaq:RMBS ->News), a leading developer of chip interface products and services, today>revealed that the Cell processor incorporates Rambus's XDR memory and>FlexIO(TM) processor bus interface solutions.Oh well. I won't be buying anything containing a Cell processor then.PS2 used Rambus as well... it actually works decently in their HW config. Despite my rather distaste for Rambus the company and recognizing that their technology just doesn't fit into the PC realm, for the PS2 and the PS3 their stuff makes VERY good sense. With the way that the PS2 processor and this new Cell processor work, combined with the nature of the machine (ie to play games), bandwidth is likely to be quite important while latency will be somewhat less so. Remember that these processors are going to be doing a lot of work traditionally associated with GPUs in a PC. Rambus' solutions, both XDR now and RDRAM back when the PS2 was new, do offer VERY high per-pin bandwidth and that's just the sort of thing that these consoles need. The processors also have integrated memory controllers which helps avoid some of the potential issues with Rambus in PCs. To top it off, the memory chips are getting soldered right onto the system board rather than hanging off multidrop sockets on the system board. Basically a PC and the PS2/PS3 have rather different designs and different requirements. Hmm.. different solutions for different problems... whodda thunk it! :> ------------- Tony Hill hilla <underscore> 20 <at> yahoo <dot> ca
TAke a look at Alpha's Piranha , thats a perfect eg. of how ppl r trying
to employ Rambus for Server CMP technology

I guess my expectations for Cell were pretty high. But i guess most of
the size of the die is for accomodating the greater number of pins
required to feed the behemoth. 8 Vector processor on a die is close to
being the Cray's X1 node and they had to cool it using freon. I guess
the cache is way too small (2.5MB is nothing for a high performance
Vector processor)

[keith]

On Wed, 09 Feb 2005 17:43:22 +0000, Never anonymous Bud wrote:
Using a finger dipped in purple ink, "NEXT BOX" <nextbox@xbox2.net> scribed: The high-end video cards coming outnow can process the rendering chain as fast as the Cell can, And cost $500 or more. Not conducive to mass-marketing of game systems.

I'm not sure that's true. My son manages a "software" retail store. It's
amazing what people will spend. If he had a thousand Nintendo DS's
(whatever they're called) he could have sold 'em. He could have gotten
*big* bux on EBay for his SO's. Never underestimate the number of nuts
with serious money out there. They simply need to be convinced to part
with it. That phase seems to have long started.

--
Keith

[keith]

On Wed, 09 Feb 2005 14:15:05 +0000, FredK wrote:
"Jeremy Williamson" <jeremiah.d.williamson@NOSPAMintel.com> wrote in message news:cubk4e$kii$1@news01.intel.com... "Mike Tomlinson" <nospam@nospam.jasper.org.uk> wrote in message news:j4igp6AI9MCCFwE1@jasper.org.uk... In article <PdydnevuBZAsT5rfRVn-vg@comcast.com>, NEXT BOX <nextbox@xbox2.net> writes >SAN FRANCISCO--(BUSINESS WIRE)--Feb. 7, 2005-- Rambus Inc. (Nasdaq:RMBS - >News), a leading developer of chip interface products and services, today >revealed that the Cell processor incorporates Rambus's XDR memory and >FlexIO(TM) processor bus interface solutions. Oh well. I won't be buying anything containing a Cell processor then. -- Rarely do people communicate; they just take turns talking. (source unknown) PS2 used Rambus as well... it actually works decently in their HW config. The example of Rambus done right is the Alpha EV7

Yeah, that helped the Q-Continuum a lot too!

--
Keith

[The little lost angel]

On Tue, 08 Feb 2005 02:44:21 -0500, Tony Hill
<hilla_nospam_20@yahoo.ca> wrote:
Has anyone figured out how this processor is actually going to improvea television in any way? I'm really curious about this one. Justwhat is it that they're planning on processing in the TV signal? DRM?

I think the concept is to make everything part of a distributed
computing network by using the same processing unit. Sure your TV
might not need that much processing power to handle HDTV decryption
but you can link it up to your Cell PC to offload some of that wedding
video encoding you're doing... along with your radio, refrigerator and
PDA.

Just think of how much $$$ we're talking about here if everything runs
on Cell so I'm sure they will figure out a way to use Cell in TV,
toilet flush and trash bin too :pPpPP
--
L.Angel: I'm looking for web design work.
If you need basic to med complexity webpages at affordable rates, email me :)
Standard HTML, SHTML, MySQL + PHP or ASP, Javascript.
If you really want, FrontPage & DreamWeaver too.
But keep in mind you pay extra bandwidth for their bloated code

[NEXT BOX]

http://macdailynews.com/index.php/weblog/comments/4967/

Intel has no answer to the 'Cell' processor; will Apple use it in
Macs?

Wednesday, February 09, 2005 - 11:50 PM EST



"IBM, Sony and Toshiba unveiled a new supercomputer-on-a-chip Monday
that could disrupt Intel's dominance of the computer industry and change the
nature of digital entertainment," Dean Takahashi reports for The San Jose
Mercury News. "The Cell chip will first be used in Sony's PlayStation 3
video console next year, with Toshiba planning to use the Cell in digital
television sets and IBM intending to put it in computer servers and work
stations in the near future."

"The partners say the first Cell chips, which can simultaneously
juggle multiple computing tasks, will have 10 times the processing power of
comparable Intel chips. Eventually, the technology could pack the power of a
supercomputer in a handheld device," Takahashi reports. "That would mean
consumers would be able to buy a machine that runs video games so
realistically that players will feel like they are inside the animated world
of, say, 'Shrek 2.'"

"'This is a shot across the bow for Intel,' said Richard Doherty, an
analyst at the Envisioneering Group, a consulting firm in Seaford, N.Y.
'Intel still uses an architecture that came from a calculator chip,' he
said. 'Cell comes from a clean sheet of paper, where the engineers had the
freedom to design from scratch for machines that manipulate images.' There
is no indication that Intel has a response to the Cell chip in the works. On
Monday, the Santa Clara chip maker, whose chips run 85 percent of the
world's PCs, said it will begin selling PC microprocessors with two
processors on a single chip by summer," Takahashi reports.

"No one expects the new Intel chips to have anywhere near the
processing power of the Cell, which will be made by IBM and Sony... Analysts
were intrigued that the Cell uses IBM technology that enables it to run any
operating system," Takahashi reports. "Kevin Krewell, editor of the
Microprocessor Report, said that raises the possibility that Apple Computer,
which already uses the PowerPC design upon which Cell is based, could use
the new chips in future Macintosh computers. Of course, winning over Apple
might be considered a small ambition for the IBM-Sony-Toshiba alliance.
'Cell really represents a supercomputer on a chip,' Kahle said."

[INGSOC]

NEXT BOX wrote:
http://macdailynews.com/index.php/weblog/comments/4967/ "That would mean consumers would be able to buy a machine that runs video games so realistically that players will feel like they are inside the animated world of, say, 'Shrek 2.'"


Gee, and people are disappointed because we don't have cool rotating
spacestations like in "2001".

--
Texeme
http://texeme.com

[Folug the enraged]

jack, <jack@ibm.com>, the repulsive, sour rectum, and unskilled farm worker,
chided:
Anyway the other day I decided to get a mirror and look at my vagina which, I did. I opened my legs and looked inside my vagina and saw that it was all pink and looked like lumpy tissue. I was traumatised.

[Toger the hempseed-dipper]

jack, <jack@ibm.com>, the gauche, tedious mouse, and hay baler, chinned:
Quolik the lowbrow <quolik.the.lowbrow@soc.med.black.amateur> wrote: Just what the hell is your beef with Tony, you lame ass POS? FOAD.

BWAHAHAHAHAHA! There you are, sitting in the sewer complaining about the
stench, totally unaware that you're adding to it. Go and fuck yourself with
a sharp, hot-running chainsaw, you brain-dead fucktard.

[chrisv]

chrisv chrisv@nospam.invalid, wrote in message
1ak015vp8lf2gie7on15726vsg4pv54hn@4ax.com: jack wrote: Quolik the lowbrow <quolik.the.lowbrow@soc.med.black.amateur> wrote: Just what the hell is your beef with Tony, you lame ass POS? FOAD. It's just a stupid troll with a random name generator, which it uses to avoid kill-files. I advise deleting unread any post from someone with a name that resembles, in any way, "Quolik the lowbrow".

This fucks you every time, eh.

[Daniel Johnson]

On 2005-02-10 01:07:53 -0500, "NEXT BOX" <nextbox@xbox2.net> said:
http://macdailynews.com/index.php/weblog/comments/4967/ Intel has no answer to the 'Cell' processor; will Apple use it in Macs?

Not too likely. The cell is not a general purpose CPU; Most programs
have a working set larger than the 256k memory the Cell supports, and
changing them to work in 256k increments would rather hard.

The Cell seems to be intended for use as a sort of co-processor, and
maybe they could be used to build a sort of GPU. But the benefits will
be in any event pretty limited.

[Trent]

On Wed, 09 Feb 2005 18:51:43 GMT Rob Stow <rob.stow.nospam@shaw.ca> wrote
in Message id: <3ZsOd.343272$Xk.112811@pd7tw3no>:
NEXT BOX wrote:[Snip]Plonk !

What took you so long?

[Anton Ertl]

Tony Hill <hilla_nospam_20@yahoo.ca> writes:With the way that the PS2 processor and this new Cell processor work,combined with the nature of the machine (ie to play games), bandwidthis likely to be quite important while latency will be somewhat lessso. Remember that these processors are going to be doing a lot ofwork traditionally associated with GPUs in a PC. Rambus' solutions,both XDR now and RDRAM back when the PS2 was new, do offer VERY highper-pin bandwidth and that's just the sort of thing that theseconsoles need. The processors also have integrated memory controllerswhich helps avoid some of the potential issues with Rambus in PCs. Totop it off, the memory chips are getting soldered right onto thesystem board rather than hanging off multidrop sockets on the systemboard.

Given all of that, Rambus would also make sense for graphics cards
(where all of the same things hold). Yet both Nvidia and ATI go with
DDR-SDRAM. Why? Is the savings by reducing pins less than the
premium for Rambus RAM? If so, wouldn't it also make sense for PS3 to
use DDR(2)-SDRAM?

In essensce, what's so different between the PS3 and graphics cards
that one goes with Rambus whereas the others go with DDR(2)?

Followups to comp.arch

- anton
--
M. Anton Ertl Some things have to be seen to be believed
anton@mips.complang.tuwien.ac.at Most things have to be believed to be seen
http://www.complang.tuwien.ac.at/anton/home.html

[Maynard Handley]

In article <420af620.315291312@news.singnet.com.sg>,
a?n?g?e?l@lovergirl.lrigrevol.moc.com (The little lost angel) wrote:
On Tue, 08 Feb 2005 02:44:21 -0500, Tony Hill <hilla_nospam_20@yahoo.ca> wrote:Has anyone figured out how this processor is actually going to improvea television in any way? I'm really curious about this one. Justwhat is it that they're planning on processing in the TV signal? DRM? I think the concept is to make everything part of a distributed computing network by using the same processing unit. Sure your TV might not need that much processing power to handle HDTV decryption but you can link it up to your Cell PC to offload some of that wedding video encoding you're doing... along with your radio, refrigerator and PDA. Just think of how much $$$ we're talking about here if everything runs on Cell so I'm sure they will figure out a way to use Cell in TV, toilet flush and trash bin too :pPpPP

People might want to remember Bluetooth piconets and all that sort of
magic --- rather different from the pretty pathetic mundane reality of
Bluetooth.
if it sounds too good to be true, it probably is --- the software to
make this sort of thing happen doesn't just appear out of nowhere, and
the fact that we haven't seen realistic prototypes in any domains ---
university projects, company demos etc --- doesn't give the idea much
credibility.

Maynard

[Fetch, Rover, Fetch]

Daniel Johnson wrote: On 2005-02-10 01:07:53 -0500, "NEXT BOX" <nextbox@xbox2.net> said: http://macdailynews.com/index.php/weblog/comments/4967/ Intel has no answer to the 'Cell' processor; will Apple use it in Macs? Not too likely. The cell is not a general purpose CPU; Most programs have a working set larger than the 256k memory the Cell supports, and changing them to work in 256k increments would rather hard. The Cell seems to be intended for use as a sort of co-processor, and maybe they could be used to build a sort of GPU. But the benefits will be in any event pretty limited.
not -

the cell is a G5 processor with *ADDTIONALLY* cpus on the same chip

also if you had bothered to read -
the cell's G5 carries a 32K level cache, and a 512K level 2 cache
while the 'satellite' cpus carry the 256K cache

excepting die size (giant at 221 mm) there is no practical reason that
these could not be put into Macs, or any other general use PC (including
in a dual [Mac tower] or quad [IBM Server] processor configuration).

[NEXT BOX]

"Fetch, Rover, Fetch" <Fetch-Rover-Fetch@K9University.edu> wrote in message
news:MsKdne8ZpdibxZbfRVn-tQ@comcast.com... Daniel Johnson wrote: On 2005-02-10 01:07:53 -0500, "NEXT BOX" <nextbox@xbox2.net> said: http://macdailynews.com/index.php/weblog/comments/4967/ Intel has no answer to the 'Cell' processor; will Apple use it in Macs? Not too likely. The cell is not a general purpose CPU; Most programs have a working set larger than the 256k memory the Cell supports, and changing them to work in 256k increments would rather hard. The Cell seems to be intended for use as a sort of co-processor, and maybe they could be used to build a sort of GPU. But the benefits will be in any event pretty limited. not - the cell is a G5 processor with *ADDTIONALLY* cpus on the same chip also if you had bothered to read - the cell's G5 carries a 32K level cache, and a 512K level 2 cache while the 'satellite' cpus carry the 256K cache excepting die size (giant at 221 mm) there is no practical reason that these could not be put into Macs, or any other general use PC (including in a dual [Mac tower] or quad [IBM Server] processor configuration).

Cell's master CPU is not a G5 processor. it's much more streamlined than a
G5.

[NEXT BOX]

close up of 1st generation Cell Processor
http://ascii24.com/news/i/tech/article/2005/02/10/images/images765505.jpg


close up of SPU - Synergistic Processing Unit - eight SPUs per Cell
Processor
http://ascii24.com/news/i/tech/article/2005/02/10/images/images765508.jpg

(Synergistic Processing Unit = Synergistic Processor Unit = Synergistic
Processor Element =
Synergistic Processing Element = Attached Processing Unit = Auxillary
Processing Unit)




SPU block diagram
http://ascii24.com/news/i/tech/article/2005/02/10/images/images765507.jpg


SPU reached 5.2 GHz in lab tests
http://ascii24.com/news/i/tech/article/2005/02/10/images/images765535.jpg


Cell power management features
http://ascii24.com/news/i/tech/article/2005/02/10/images/images765504.jpg

[Alex Colvin]

> Intel has no answer to the 'Cell' processor; will Apple use it inMacs?

what? Itanic doesn't count?



--
mac the naïf

[Alex Colvin]

>> >> Intel has no answer to the 'Cell' processor; will Apple use it in> Macs?
the cell is a G5 processor with *ADDTIONALLY* cpus on the same chip
Cell's master CPU is not a G5 processor. it's much more streamlined than aG5.

Actually, intel also has a streamlined processor with *16* additional
processors on the same chip. and a RDRAM interface. and honking I/O
bandwidth.

http://www.intel.com/design/network/products/npfamily/docs/ixp2800_docs.htm#Datasheets
--
mac the naïf

[Alex Colvin]

>>> >> Intel has no answer to the 'Cell' processor; will Apple use it in >> Macs?
http://www.intel.com/design/network/products/npfamily/docs/ixp2800_docs.htm#Datasheets

absolutely no FP, though

--
mac the naïf

[Fetch, Rover, Fetch]

NEXT BOX wrote: "Fetch, Rover, Fetch" <Fetch-Rover-Fetch@K9University.edu> wrote in message news:MsKdne8ZpdibxZbfRVn-tQ@comcast.com...Daniel Johnson wrote:On 2005-02-10 01:07:53 -0500, "NEXT BOX" <nextbox@xbox2.net> said:> http://macdailynews.com/index.php/weblog/comments/4967/>> Intel has no answer to the 'Cell' processor; will Apple use it in>Macs?Not too likely. The cell is not a general purpose CPU; Most programshave a working set larger than the 256k memory the Cell supports, andchanging them to work in 256k increments would rather hard.The Cell seems to be intended for use as a sort of co-processor, andmaybe they could be used to build a sort of GPU. But the benefits willbe in any event pretty limited.not -the cell is a G5 processor with *ADDTIONALLY* cpus on the same chipalso if you had bothered to read -the cell's G5 carries a 32K level cache, and a 512K level 2 cachewhile the 'satellite' cpus carry the 256K cacheexcepting die size (giant at 221 mm) there is no practical reason thatthese could not be put into Macs, or any other general use PC (includingin a dual [Mac tower] or quad [IBM Server] processor configuration). Cell's master CPU is not a G5 processor. it's much more streamlined than a G5.
My bad - I read PPC processor, and inferred G5

however, from the article I read, there is no (more) specific info on
the core processor.

This is the article I read:
<http://www.computerworld.com/hardwaretopics/hardware/story/0,10801,99607,00.html>

[Fetch, Rover, Fetch]

much more info here:
http://www.physorg.com/weblog/news1048.html

[keith]

On Thu, 10 Feb 2005 07:46:59 -0600, NEXT BOX wrote:
"Fetch, Rover, Fetch" <Fetch-Rover-Fetch@K9University.edu> wrote in message news:MsKdne8ZpdibxZbfRVn-tQ@comcast.com... Daniel Johnson wrote: On 2005-02-10 01:07:53 -0500, "NEXT BOX" <nextbox@xbox2.net> said:> http://macdailynews.com/index.php/weblog/comments/4967/>> Intel has no answer to the 'Cell' processor; will Apple use it in> Macs? Not too likely. The cell is not a general purpose CPU; Most programs have a working set larger than the 256k memory the Cell supports, and changing them to work in 256k increments would rather hard. The Cell seems to be intended for use as a sort of co-processor, and maybe they could be used to build a sort of GPU. But the benefits will be in any event pretty limited. not - the cell is a G5 processor with *ADDTIONALLY* cpus on the same chip also if you had bothered to read - the cell's G5 carries a 32K level cache, and a 512K level 2 cache while the 'satellite' cpus carry the 256K cache excepting die size (giant at 221 mm) there is no practical reason that these could not be put into Macs, or any other general use PC (including in a dual [Mac tower] or quad [IBM Server] processor configuration). Cell's master CPU is not a G5 processor. it's much more streamlined than a G5.

No, at least the way I "read" things the cell's cpu is pretty much
a stripped-down in-order PowerPC. The 'G5' is very much out-of-order and
hardly stripped.

--
Keith

[Tony Hill]

On Wed, 09 Feb 2005 21:51:54 -0500, Arrvindh Shriraman
<arrvindh_shriraman@yahoo.com> wrote:
Tony Hill wrote: Basically a PC and the PS2/PS3 have rather different designs and different requirements. Hmm.. different solutions for different problems... whodda thunk it! :>TAke a look at Alpha's Piranha , thats a perfect eg. of how ppl r tryingto employ Rambus for Server CMP technology

And a fat load of good it's done the Alpha. To be fair though, I
don't think that it's collapse had anything to do with using Rambus
memory one way or the other.

Besides, ever there it's not exactly showing tremendous performance.
Even in SPEC CFP2000, kind of the ideal benchmark for this
super-bandwidth setup, the EV7 is still being beaten by current x86
processors. When looking at other tests it's even less impressive.

Now again those results are not necessarily an indication that Rambus
is a failure because there are MANY other issues holding the EV7s
performance back (only some of which are technical). Unfortunately
it's impossible to say just how well/poorly a theoretical EV7 with a
DDR-SDRAM interface might have compared to the RDRAM one. However I'm
not sure that one can really hold up EV7 as a success story for Rambus
in any way.
I guess my expectations for Cell were pretty high. But i guess most ofthe size of the die is for accomodating the greater number of pinsrequired to feed the behemoth. 8 Vector processor on a die is close tobeing the Cray's X1 node and they had to cool it using freon. I guessthe cache is way too small (2.5MB is nothing for a high performanceVector processor)

Keep in mind that this chip and the Cray X1 are designed for VERY
different workloads. The Cell is likely to be rather weak
(comparatively speaking) when running scientific computing as compared
to how it works in a gaming console.

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca

[Tony Hill]

On Thu, 10 Feb 2005 05:52:58 GMT,
a?n?g?e?l@lovergirl.lrigrevol.moc.com (The little lost angel) wrote:
On Tue, 08 Feb 2005 02:44:21 -0500, Tony Hill<hilla_nospam_20@yahoo.ca> wrote:Has anyone figured out how this processor is actually going to improvea television in any way? I'm really curious about this one. Justwhat is it that they're planning on processing in the TV signal? DRM?I think the concept is to make everything part of a distributedcomputing network by using the same processing unit. Sure your TVmight not need that much processing power to handle HDTV decryptionbut you can link it up to your Cell PC to offload some of that weddingvideo encoding you're doing... along with your radio, refrigerator andPDA.Just think of how much $$$ we're talking about here if everything runson Cell so I'm sure they will figure out a way to use Cell in TV,toilet flush and trash bin too :pPpPP

Riiiiigghtttt.... And just WHO is going to write the software for my
networked toilet? Please tell me it's not Microsoft, because that's
one place I do NOT want a blue-screen! :>

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca

[Tony Hill]

On Thu, 10 Feb 2005 07:48:06 -0500, "Fetch, Rover, Fetch"
<Fetch-Rover-Fetch@K9University.edu> wrote:
Daniel Johnson wrote: On 2005-02-10 01:07:53 -0500, "NEXT BOX" <nextbox@xbox2.net> said: http://macdailynews.com/index.php/weblog/comments/4967/ Intel has no answer to the 'Cell' processor; will Apple use it in Macs? Not too likely. The cell is not a general purpose CPU; Most programs have a working set larger than the 256k memory the Cell supports, and changing them to work in 256k increments would rather hard. The Cell seems to be intended for use as a sort of co-processor, and maybe they could be used to build a sort of GPU. But the benefits will be in any event pretty limited.not -the cell is a G5 processor with *ADDTIONALLY* cpus on the same chip

The Cell's PowerPC core is more definitely NOT a G5 processor, nor is
it really in any way related to it except that they both use the PPC
ISA.
also if you had bothered to read -the cell's G5 carries a 32K level cache, and a 512K level 2 cachewhile the 'satellite' cpus carry the 256K cache

<yawn>
excepting die size (giant at 221 mm) there is no practical reason thatthese could not be put into Macs, or any other general use PC (includingin a dual [Mac tower] or quad [IBM Server] processor configuration).

Sure, they could, but they wouldn't be anywhere near as fast as any
current processors unless you can make use of the vector engine. And
doing that means changing ALL of the software, and that is
*EXPENSIVE*.


We will definitely NOT see the Cell processor (or it's descendants)
showing up in any meaningful way (ie not just a couple special-purpose
workstations from IBM) as the main processor in desktop computers for
AT LEAST 5 years, probably more like 10+ years if ever. And yes, you
can quote me on that.

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca

[Tony Hill]

On Thu, 10 Feb 2005 10:56:07 GMT, anton@mips.complang.tuwien.ac.at
(Anton Ertl) wrote:
Tony Hill <hilla_nospam_20@yahoo.ca> writes:With the way that the PS2 processor and this new Cell processor work,combined with the nature of the machine (ie to play games), bandwidthis likely to be quite important while latency will be somewhat lessso. Remember that these processors are going to be doing a lot ofwork traditionally associated with GPUs in a PC. Rambus' solutions,both XDR now and RDRAM back when the PS2 was new, do offer VERY highper-pin bandwidth and that's just the sort of thing that theseconsoles need. The processors also have integrated memory controllerswhich helps avoid some of the potential issues with Rambus in PCs. Totop it off, the memory chips are getting soldered right onto thesystem board rather than hanging off multidrop sockets on the systemboard.Given all of that, Rambus would also make sense for graphics cards(where all of the same things hold). Yet both Nvidia and ATI go withDDR-SDRAM. Why? Is the savings by reducing pins less than thepremium for Rambus RAM? If so, wouldn't it also make sense for PS3 touse DDR(2)-SDRAM?

I've wondered the very same thing myself. To me, from the outside at
least, it seems like it would make sense. Rambus memory has been used
in video cards before, but only in some very rare situations. I don't
even think there would be much of a cost difference for the memory
chips even, given that video cards use very high-end/high speed GDDR3
memory, quite a bit more expensive than the DDR memory used in desktop
PCs.

However nVidia has commented before that they have evaluated Rambus
memory on more than one occasion and found it to be unsuitable for
their application. It's always made me wonder if maybe they know
something that the rest of us don't? Or maybe their decision was only
partly based on technical reasons and partly on more political/legal
related ones? Or maybe it has to do with Rambus licensing fees for
the memory controller rather than for the memory itself?

In short, I really don't know what the answer is here.
In essensce, what's so different between the PS3 and graphics cardsthat one goes with Rambus whereas the others go with DDR(2)?

Not much from where I'm standing.

-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca

[NEXT BOX]

Back to Basics
The fundamental task of a processor is to manage the flow of data through
its computational units. However in the past two decades, each successive
generation of processors for personal computers has added more transistors
dedicated to increasing the performance of spaghetti-like integer code. For
example, it is well known that typical integer codes are branchy and that
branch mispredict penalties are expensive; in an effort to minimize the
impact of branch instructions, transistors were used to develop highly
accurate branch predictors. Aside from branch predictors, sophisticated
cache hierarchies with large tag arrays and predictive cache prefetch units
attempt to hide the complexity of data movement from the software, and
further increase the performance of single threaded applications. The
pursuit of single threaded performance can be observed in recent years in
the proposal of extraordinarily deeply pipelined processors design